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VerilogDriver.h
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1 
8 #ifndef VERILOGPARSER_DRIVER_H
9 #define VERILOGPARSER_DRIVER_H
10 
11 #include "VerilogDataBase.h"
12 
16 namespace VerilogParser {
17 
18 using std::cout;
19 using std::endl;
20 using std::cerr;
21 using std::string;
22 using std::vector;
23 using std::pair;
24 using std::make_pair;
25 using std::ostringstream;
26 
35 class Driver
36 {
37 public:
41 
44 
47 
49  string streamname;
50 
56  bool parse_stream(std::istream& in,
57  const string& sname = "stream input");
58 
64  bool parse_string(const string& input,
65  const string& sname = "string stream");
66 
72  bool parse_file(const string& filename);
73 
74  // To demonstrate pure handling of parse errors, instead of
75  // simply dumping them on the standard error output, we will pass
76  // them to the driver using the following two member functions.
77 
80  void error(const class location& l, const string& m);
81 
84  void error(const string& m);
85 
88  class Scanner* lexer;
89 
93 
95  void module_name_cbk(std::string const&, std::vector<GeneralName> const&);
96  void wire_pin_cbk(std::string&, std::string&, Range const& = Range());
97  void wire_pin_cbk(int, int, std::string&);
98  void wire_pin_cbk(std::vector<GeneralName>&, std::string&);
99  void wire_declare_cbk(std::vector<GeneralName> const&, Range const&);
100  void wire_declare_cbk(std::vector<GeneralName> const& vNetName);
101  void pin_declare_cbk(std::vector<GeneralName> const&, unsigned, Range const&);
102  void pin_declare_cbk(std::vector<GeneralName> const&, unsigned);
103  void module_instance_cbk(std::string const&, std::string const&);
104  void assignment_cbk(std::string const&, Range const&, std::string const&, Range const&);
106 
107 protected:
110  vector<NetPin> m_vNetPin;
111 };
112 
117 bool read(VerilogDataBase& db, const string& verilogFile);
118 
119 } // namespace example
120 
121 #endif // EXAMPLE_DRIVER_H
string streamname
stream name (file or input stream) used for error messages.
Definition: VerilogDriver.h:49
bool trace_scanning
enable debug output in the flex scanner
Definition: VerilogDriver.h:43
range with pair of low and high values
class Scanner * lexer
Definition: VerilogDriver.h:88
bool trace_parsing
enable debug output in the bison parser
Definition: VerilogDriver.h:46
bool parse_string(const string &input, const string &sname="string stream")
Driver(VerilogDataBase &db)
Database for Verilog parser.
bool parse_file(const string &filename)
bool read(VerilogDataBase &db, const string &verilogFile)
API for VerilogParser. Read Verilog file and initialize database by calling user-defined callback fun...
void error(const class location &l, const string &m)
VerilogDataBase & m_db
Definition: VerilogDriver.h:92
bool parse_stream(std::istream &in, const string &sname="stream input")
Base class for verilog database. Only pure virtual functions are defined. User needs to inheritate th...
namespace for VerilogParser
vector< NetPin > m_vNetPin
Use as a stack for node and pin pairs in a net, because wire_pin_cbk will be called before module_ins...