8 #ifndef VERILOGPARSER_DRIVER_H
9 #define VERILOGPARSER_DRIVER_H
25 using std::ostringstream;
57 const string& sname =
"stream input");
65 const string& sname =
"string stream");
80 void error(
const class location& l,
const string& m);
84 void error(
const string& m);
95 void module_name_cbk(std::string
const&, std::vector<GeneralName>
const&);
96 void wire_pin_cbk(std::string&, std::string&,
Range const& =
Range());
97 void wire_pin_cbk(
int,
int, std::string&);
98 void wire_pin_cbk(std::vector<GeneralName>&, std::string&);
99 void wire_declare_cbk(std::vector<GeneralName>
const&,
Range const&);
100 void wire_declare_cbk(std::vector<GeneralName>
const& vNetName);
101 void pin_declare_cbk(std::vector<GeneralName>
const&,
unsigned,
Range const&);
102 void pin_declare_cbk(std::vector<GeneralName>
const&,
unsigned);
103 void module_instance_cbk(std::string
const&, std::string
const&);
104 void assignment_cbk(std::string
const&,
Range const&, std::string
const&,
Range const&);
121 #endif // EXAMPLE_DRIVER_H
string streamname
stream name (file or input stream) used for error messages.
bool trace_scanning
enable debug output in the flex scanner
range with pair of low and high values
bool trace_parsing
enable debug output in the bison parser
bool parse_string(const string &input, const string &sname="string stream")
Driver(VerilogDataBase &db)
Database for Verilog parser.
bool parse_file(const string &filename)
bool read(VerilogDataBase &db, const string &verilogFile)
API for VerilogParser. Read Verilog file and initialize database by calling user-defined callback fun...
void error(const class location &l, const string &m)
bool parse_stream(std::istream &in, const string &sname="stream input")
Base class for verilog database. Only pure virtual functions are defined. User needs to inheritate th...
namespace for VerilogParser
vector< NetPin > m_vNetPin
Use as a stack for node and pin pairs in a net, because wire_pin_cbk will be called before module_ins...